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Standard Cell |
Optimum-sized cells from the transistor level (building block type) are placed on the logic areas, consequently, standard cells feature a higher degree of integration than macro embedded cell arrays and can realize high-performance LSIs. Fujitsu provides products supporting high-performance and low-power-consumption.
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Datasheet |
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Embedded Array |
Embedded Arrays are LSIs that incorporate optimum-sized macros from the transistor level on the gate arrays. Their manufacture begins after floor planning (macro placement, etc.), So the post-design development period is the same as that for gate arrays, resulting in higher-performance LSIs than gate arrays. Fujitsu provides a wide range of framing alternatives.
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Datasheet |
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Gate Array |
Gate arrays are chips (seas-of-gates type) with regularly placed transistors (basic cells). On these LSIs, circuits function only through wiring. Consequently, development time is substantially reduced. Fujitsu provides products (e.g. CG61P) incorporating PLL analog in short development period.
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Datasheet |
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